SAMSUNG ELECTRONICS CO., LTD. (Suwon-si, KR)
What is a Patent for Method and apparatus for encoding and decode codes of low density parity
Search Patent for Method and apparatus for encoding and decode codes of low density parity
One or more exemplary embodiments could overcome the above disadvantages and also other disadvantages that are not mentioned in the above paragraphs. The exemplary embodiments are not enough to overcome the problems and they may not be able to solve any of the problems.
One or more exemplary embodiments offer a method and apparatus for decoding and encoding LDPC codes capable of improving LDPC decoding and encoding capabilities.
In accordance with one aspect of an exemplary embodiment, there is an encoding apparatus which may comprise the following: an LDPC encoder that can perform LDPC encoding on input bits, based on an initial parity-checking matrix or a parity-check second matrix to create an LDPC codeword that is composed of 64,800 bits, wherein the parity-check matrix contains an information word sub-matrix as well as a parity sub-matrix, and the sub-matrix for information words is composed of a variety of column blocks that each comprise 360 columns. It’s also defined as the table that represents the values of one (1) that are displayed in each 360-th column.
The LDPC encoder could perform LDPC encoding using a parity-check matrix, which is defined in Table 17 when a code rate is 6/15.
The LDPC encoder could perform LDPC encoder using a parity-check matrix, which is specified in a table, such as Table 14 in the case of a code rate of 8/15.
The LDPC encoder can perform LDPC encoder using a parity-check matrix, which is defined in a table like Table 18 when the code rate is 10/15.
The LDPC encoder may perform the LDPC encoder using a parity-check matrix defined by tables like Table 16 when the code rate is 12/15.
In accordance with one aspect of a different embodiment, there is an encoder method that can comprise: creating an LDPC codeword that is composed of 64,800 bits by performing LDPC encoding on input bits based on a parity-check matrix, where the parity-check matrix comprises an information word sub-matrix as well as parity sub-matrix. The information word sub-matrix is formed by a variety of column blocks that each comprise 360 columns, and is defined by a table which is a representation of the positions of value one (1) which are presented in every 360-th column.
When generating the LDPC codeword, the LDPC encoding may be performed by using a parity-checking matrix as that is defined in a table such as Table 17 when a code rate is 6/15.
In the generation of the LDPC codeword In the encoding of the LDPC codeword, LDPC encoding may be performed using a parity-check matrix which is specified by a table, such as Table 14 in the case of a code rate of 8/15.
If the code rate of 10/15 is used when the code rate is 10/15, the LDPC codeword could be generated using a parity check matrix such as Table 18.
When generating the LDPC codeword, the LDPC encoder can be used with a parity check matrix that is that is defined in a table such as Table 16 when the code rate is 12/15.
According to one aspect of yet another example embodiment the invention provides a decoding apparatus which may comprise an LDPC decoder that is configured to perform LDPC decoding of an LDPC codeword comprising 64,800 bits that are based on a parity-check matrix,wherein the parity-check matrix includes an information word sub-matrix as well as parity sub-matrix. the sub-matrix for information words is composed from a number of column blocks each including 360 columns. It is defined as a table that representspositions of value one (1) which are displayed in each 360-th column.
If the code rate is 6/15 and the LDPC encoder will perform the LDPC descoding using the parity check matrix such as Table 17.
The LDPC decoder could perform LDPC decoding with a parity check matrix defined by a table like Table 14 when the code rate is 8/15.
If the rate of code is 10/15, the LDPC encoder can perform the LDPC descoding using an LDPC parity check matrix, such as Table 18.
When the rate of code is 12/15 then the LDPC encoder will perform the LDPC descoding with the parity check matrix such as Table 16.
In accordance with one aspect of yet another example embodiment, there is provided the method of decoding that may include performing LDPC decoding of an LDPC codeword comprising 64,800 bits, based on a parity-check matrix, that is, the parity checkmatrix has an information word sub-matrix, as well as parity sub-matrix. The sub-matrix for information words is composed of a plurality of column blocks, each comprising 360 columns. It is defined by a table that is a representation of the positions with value one (1) in each 360-th column.
When performing LDPC decoding in the process, LDPC decoding may be performed by using a parity-checking matrix as which is created by a table, such as Table 17 in the case of a code rate of 6/15.
When process of LDPC decoding in the process, LDPC decoding may be performed using a parity-check matrix that is defined in a table such as Table 14 in the case of a code rate of 8/15.
In the performing the LDPC decoding In the process of decoding LDPC, LDPC decoding could be carried out using a parity-check matrix which is defined by a table, such as Table 18 when the code rate is 10/15.
When the code rate is 12/15, the LDPC can be decoded with the help of a the parity check matrix like Table 16.
Additional and/or other aspects and advantages of the exemplary embodiments will be set forth in the description that follows , and in part, will be obvious from the description, or learnt through practice of these embodiments.
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