Apple Inc. (Cupertino, CA)
What is a Patent for Electronic display featuring hybrid in-pixels and external compensation
Search Patent for Electronic display featuring hybrid in-pixels and external compensation
This relates generally to electronic devices with displays and, more particularly, to display driver circuitry for displays such as organic-light-emitting diode displays.
Displays are often integrated into electronic devices. For example, mobile phones and laptop computers have displays to present data to the users.
Organic light-emitting device displays employ various pixels that are based on light emitting diodes. In this type of display, each display pixel includes a light-emitting diode and thin-film transistors for controllingapplication of a signal to the light-emitting diode to produce light.
An organic light-emitting device display pixel has an drive transistor that is connected to a data line via an access transistor. An access transistor might include a gate terminal which receives scan signals via the scanner. The scan signal could be used to activate the access transistors by loading image data via the data line to the display pixels. A current source transistor is included in the display pixel that provides current to the organic light emitting diode in order to produce light.
Process Variations in temperature and voltage can affect transistors in organic light-emitting dim display pixels. Because of these changes, the transistor threshold voltages between different display pixels may fluctuate. The variations in threshold voltages of transistors could cause the display pixels to emit amounts of light that do not correspond to the desired image. It is within this context that the embodiments herein arise.
Displays can be found in electronic devices that have many pixels. Display pixels can be organic light-emitting display pixels. A light-emitting organic transistor (OLED) that emits light, may be included in each display pixel. Semiconducting transistors can be of n-type, while every other transistor in the pixel could be p-type (e.g. PMOS LTPSthin film transistors).
In normal operation, a display pixel could undergo an initialization phase in which the initialization transistor or the anode reset transistor is activated to reset the display pixels. The initialization phase may be followed by oneor more on-bias stress phases in which the transistor that loads data is activated to load a data voltage at least partially onto the drive transistor. On-bias stress can be controlled automatically by an e.g., a threshold voltage sampling and a dataloading phase. Then, there is an emission phase. The current flowing through OLEDs in the emission phase won’t be affected by the drive transistor threshold voltage due to in-pixel threshold voltage cancellation.
Performing the on-bias stress phase prior to threshold voltage sampling can help mitigate any undesired hysteresis effects and improve first-frame response. If you wish the emission time can be shortened in order to decrease the potential for mismatch between the negative bias temperature stress (NBTS) and the positive bias temperature stress (PBTS) associated with the semiconducting-oxide transistor. To extend the stress the semiconducting oxide transistor can be switched on while the data loading transistor is on. External current sensing can also be enabled by the display pixel which is able to be turned off or on at will (e.g. the transistor for initialization or data loading).
The display pixel may be set up to support low-refresh rate operation (e.g., 1 Hz, 2 Hz or lower than 30 Hz, less than 60 Hz or less than 60 Hz, etc.). When operating at a low-refresh rate it is recommended that a brief refresh period is followed by a longer vertical blanking period. During the refresh period an initial on-bias stress stage can be performed immediately followed by the first threshold voltage sampling and data programming phase. A second on-bias stress stage could be performed after the first threshold sampling and data programming phase as well as a third stress phase may then be performed after the second on-bias stress stage, which is immediately followed by a second threshold voltage sampling as well as a the data programming phase. The second phase of threshold voltage sampling and the phase for data programming can be followed by an emission phase.
During the vertical blanking period, at least an additional on-bias stress phase that matches the second on-bias stress stage may be carried out to lessen flicker. The initialization voltage may be adjusted dynamically during second and fourthon-bias stress phases to reduce any conflict. Dynamically adjusting the anode reset voltage in the switch from the refresh period into the vertical blanking period could assist in improving the performance of low refresh rates.Click here to view the patent on USPTO website.
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