Apple Inc. (Cupertino, CA)

A memory controller in an integrated circuit can produce refreshes based on the rate of refresh for one or more DRAMs. The integrated circuit might comprise at least one temperature sensor. The rate of change of the temperature may be determined using the temperature sensors. The DRAMs can define an amount of refresh that the memory controller uses to create refreshes when the rate exceeds a threshold. If the rate is lower than the threshold the memory controller could create refreshes at a slower refresh rate.

Technical Field

Embodiments described herein are related to refresh operation in dynamic random access memory (DRAM).

Description of the Related Art

DRAM is typically utilized as the primary memory system in a variety of computer systems, ranging from server computers or desktop computers to laptops, personal digital assistants, smart phones, as well as other mobile devices. The DRAM’s power consumption is often a large part of the total power. In portable systems, which often are powered by a small power source like batteries, reducing the power consumption of components within the system is essential to prolonging the amount of time the system can operate with the power supply that is limited. It can also lead to heat generation which must be dissipated by every system.

DRAM memory cells are susceptible to losing data over time. They save data as an electrical charge on a capacitor and are vulnerable to leakage. The stored charge can disappear and the data read from the memory cell after the charge has sunk away is different from the value written and can result in an error operation. To prevent the loss/corruption of the data stored in the DRAM due to the loss of charge on the capacitor, memory cells are refreshed periodically (reading the value from thecells and writing the value back). Refreshes consume a substantial amount of power, and can be a major component of overall DRAM power consumption.

The required refresh rate to prevent data loss/corruption is specified for a given DRAM, and it is temperature-dependent. As temperatures rise, leakage rates increase and thus the required refresh rate is increased (e.g. It is essential to refresh more often. There are many DRAMs come with an temperature sensor. The temperature sensor decides the rate of refresh. The DRAM has a register that can be examined to determine the desired refresh rate. However, the temperature sensor implemented in the majority of DRAMs is fairly coarse-grain (e.g. Typically it is the case that the same refresh rate is assigned to all ranges between 10 and 20 degrees Celsius. The rate of refresh for a specific range is the rate needed for the highest temperature of the range. The refresh rate is higher if temperatures are lower than the rate of refresh required. Many DRAMs have only one temperature sensor. The DRAM may allow for temperature measurements that are outside the range of the temperature sensor. If hot spots do not exist, the refresh rate is more than what is actually needed. Theyargin can reach up to 10 degrees Celsius in some cases.

One or more DRAMs may be placed in close proximity of an integrated circuit, which has a memory controller to manage the DRAMs. A refresh rate may be set to trigger refreshes to DRAMs by the memory controller. In anembodiment, the integrated circuit includes multiple temperature sensors. A thermal controller is able to read the sensors and determine the rate of change in the temperature (“temperature change rate”). The memorycontroller can generate refreshes if the rate is higher than a threshold. The memory controller may create refreshes at a higher refresh rate in the event that the rate is lower than that threshold. A lower refresh rate could be a result of hot spots within DRAMs are not likely to be created when the rate is less than the threshold. The margin for DRAM temperature measurement could be less important. Additionally, the temperatures read from the temperature sensors on the integrated circuit might be more precise than the ranges of temperature which are assigned by the DRAM to the appropriate refresh rates, and thus the reduced rate may be sufficient for the actual temperature. The refreshes happen more frequently than what the DRAM stipulates. This can lower the power consumption.

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